Software Exploits for ILP We have already looked at compiler scheduling to support ILP – Altering code to reduce stalls – Loop unrolling and scheduling – Compiler-based scheduling for superscalars – VLIW Here, we examine appendix H to see additional compiler-based ideas and hardware to help support some of these ideas – Few architectures have focused on static-based approaches aside from minimal support with compiler scheduling – However, the EPIC architecture heavily relied on it, here we will view EPIC and consider to what extent it succeeds (or fails) over dynamic approaches
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